The present invention relates to a space diversity receiving system.
An example of a conventional space diversity receiving system will be described with reference to FIG. 3. FIG. 1 is a circuit diagram, partly as a block diagram, showing a space diversity receiving system for a mobile FM receiver. The outputs of antennas 1 and 2 are applied to respective input terminals of an antenna selecting circuit 3. In response to a switching signal from an antenna switching drive circuit 4, the antenna selecting circuit 3 selects one of the outputs of the antennas 1 and 2 and applies the selected output to the front end 6 of the FM receiver 5. The FM carrier signal, after being selected and converted into an intermediate frequency signal by the front end 6, is applied to an IF amplifier 7 where it is subjected to band amplification, that is, it is amplified to a predetermined level or higher. In this operation, the IF amplifier 7 serves as a limiter to remove AM components from the carrier signal. The carrier signal thus treated is applied to a conventional FM detector circuit (not shown) and there demodulated to produce an audio signal.
The IF amplifier 7 includes a level detector circuit 7a for detecting the amplitude level of a carrier signal, for instance, by envelope detection. The output of the level detector circuit 7a is applied to the base of a transistor Q.sub.1. The collector of the transistor Q.sub.1 is grounded, and the emitter is connected through a resistor R.sub.1 to a current source. The voltage applied to the resistor R.sub.1 is proportional to the output of the level detector circuit 7a. The voltage at the connecting point of the resistor R.sub.1 and the current source is applied through a resistor R.sub.2 to the negative input terminal of a level comparator circuit 9, and the voltage at the connecting point of the resistor R.sub.1 and the emitter of the transistor Q.sub.1 is applied through an integrating circuit composed of a resistor R.sub.3 and a capacitor C.sub.1 to the positive input terminal of the level comparator circuit 9. When the instantaneous value of the output of the level detector circuit 7a becomes lower than the average level, the level comparator circuit 9 provides an output. According to the output of the circuit 9, the antenna switching drive circuit 4 applies the switching signal to the antenna selecting circuit 3.
The operation of the space diversity receiving system thus constructed will be described with reference to FIG. 2. The negative input (instantaneous value) of the level comparator circuit 9 is offset biased by the resistor R.sub.1, and therefore it is higher in potential than the output (average value) of the integrating circuit when the received electric field strength is maintained substantially unchanged. In this case, the output of the comparator circuit 9 is held at the low level.
On the other hand, when the vehicle passes through a location where multi-path fading occurs or the electric field strength is low, the output of the level detector circuit 7a is momentarily greatly lowered, thus becoming lower than the aforementioned average value. As a result, the output of the level comparator circuit 9 is raised to the high level, and hence the antenna selected is switched over to other antenna by the antenna switching drive circuit 4. That is, a plurality of antennas located at different positions are selectively used to substantially eliminate, for instance, multi-path noise and fading.
Another example of a conventional space diversity receiving system will be described with reference to FIG. 3. In the system shown in FIG. 3, the receiving electric field strengths of antennas are detected individually so that, among the antennas, the one highest in signal reception level is selected. In FIG. 3, those circuit elements which have been previously described with reference to FIG. 1 are designated by the same reference numerals or characters.
In the system of FIG. 3, an oscillator circuit 51 applies a trigger signal having a predetermined period to a pulse generating circuit 52. In response to the trigger signal, the pulse generating circuit 52 produces a gate signal A, an antenna switching signal B, and a gate signal C successively. The pulse generating circuit 52 is, for instance, composed of a plurality of cascade-connected timers. The output of the level detector circuit 7a in the FM receiver 5 is applied to two sample and hold circuits 53 and 54. The sample and hold circuit 53 includes a switch circuit 53a which is closed when the gate signal A is applied thereto, and a time constant circuit with a capacitor 53b for holding a signal level. The sample and hold circuit 54 includes a switch circuit 54a which is closed when the gate signal C is applied thereto, and a time constant circuit with a capacitor 54b for holding the input signal level. The levels held by the sample and hold circuits are subjected to comparison by a level comparing circuit 55, which applies an output to an antenna switching drive circuit 56 in correspondence to the result of comparison. The antenna switching drive circuit 56 causes the antenna selecting circuit 3 to select an antenna in correspondence to the output of the level comparing circuit 55 and to select the other antenna in response to the antenna switching signal B. The antenna switching drive circuit 56 is composed of a circuit including logic elements, and an output transistor.
The operation of the system thus constructed will be described. The antenna selecting circuit 3 transmits the output of one of the antennas to the front end. When the trigger signal is applied to the pulse generating circuit 52 by the oscillating circuit 51, the gate signal A is supplied to the switch circuit 53a by the pulse generating circuit 52, whereby the switch circuit 53a is held closed for a predetermined period of time and the output level of the level detector circuit is held by the sample and hold circuit 53. When the pulse generating circuit 52 supplies the antenna switching signal B to the antenna switching drive circuit 56, the latter applies the switching signal to the antenna selecting circuit 3 to switch the antenna over to the other one. When the pulse generating circuit 52 supplies the gate signal C to the switch circuit 54a, the latter is held closed for a predetermined period of time, and the level detection output corresponding to the receiving level of the antenna selected is held by the sample and hold circuit 54. In the level comparing circuit 55, the levels held by the sample and hold circuits 53 and 53 are compared with each other. When the former is higher, the level comparing circuit 55 applies a high level signal to the antenna switching drive circuit 56. When the latter is higher or equal to the former, the level comparing circuit 55 applies a low level signal to the antenna switch drive circuit 56. In response the high level signal, the antenna switching drive circuit 56 supplies the switching signal to the antenna selecting circuit 3 so that the previously selected antenna is selected again. When the low level signal is applied to the antenna switching drive circuit 56, the present antenna is continued in use. The above-described operations are repeatedly carried out with a predetermined period using the trigger signal outputted by the oscillator circuit 51 so that signals are received satisfactorily at all times.
However, the system of FIG. 1 is disadvantageous in the following points: In the presence of a low electric field, the average output value of the integrating circuit 8 is low, and therefore the instantaneous value with the bias added scarcely comes below the average value. That is, the system does not work well in low electric fields. In addition, sometimes the received electric field strength of the antenna selected may be lower than that of the preceding antenna.
On the other hand, in the system of FIG. 3, the antennas are switched with the predetermined period. Therefore, in the case where the receiving electric field strength is relatively high and the S/N ratio is high, the antenna switching noise becomes significant.